To obtain high quality flat panel displays, active-matrix driving technology is needed. This includes liquid crystal displays (LCDs) and organic light emitting diodes (OLEDs). Active matrix driving allows full color realization and high resolution without cross-talk. The key technology of active-matrix driving display involves the fabrication of thin film transistors (TFTs) on a substrate, which is usually glass.
In conventional active matrix displays, TFTs are formed by amorphous silicon (a-Si), due to its low processing temperature and low manufacturing cost on large area glass substrates. However, it has been difficult to use the amorphous silicon TFT for advanced applications such as liquid crystal displays having very high resolution. For lower power consumption, and more compact structure, polycrystalline Si (poly-Si) is needed. In particular, if the polycrystalline silicon is formed at low temperature, peripheral driving circuits can be fabricated on the glass substrate as well. Thus, low temperature polycrystalline silicon (LTPS) may be a key technology to the future of the display market.
Presently, the techniques mainly used to crystallize a-Si to poly-Si are excimer laser crystallization (ELC), which irradiates the a-Si film with strong energy, or with nickel induced crystallization of amorphous silicon. The latter seems promising to produce poly-Si over large areas of glass substrate at low cost.
To realize this possibility, the technique of nickel induced crystallization of amorphous silicon has to meet the following requirements: (1) a low concentration of nickel after processing, (2) no alignment misplacement caused by the shrinkage of the glass substrate during the crystallization process, and (3) reduction of crystallization time to 2-3 hours. There appears to be no presently available technique that can fully satisfy these requirements. Therefore, it is an object of the present invention to use arranged continuous grain metal-induced lateral crystallized polycrystalline silicon film technology to meet the three requirements set forth above.
U.S. Pat. No. 5,705,829 (Miyanaga) discloses semiconductor device using a crystalline semiconductor film. The crystalline semiconductor film is formed by providing an amorphous silicon film with a catalyst metal for promoting crystallization thereof, and then heating to effect a thermal crystallization, following which the crystallized film is further exposed to laser light to improve the crystallinity.
U.S. Published Patent Application No. 2003/0129853 (Naoto) discloses a method for producing a thin film transistor, wherein after an amorphous silicon film is formed on a substrate, a nickel silicide layer is formed by spin coating with a solution nickel acetate solution that promotes the crystallization of silicon. The nickel silicide layer is selectively patterned to form island-like nickel silicide layers.
U.S. Pat. No. 6,737,674 (Zhang) discusses a method for eliminating influence of elemental nickel from a crystal silicon film obtained by utilizing nickel. A mask made of a silicon oxide film is formed on an amorphous silicon film. Then, the elemental nickel is held selectively on the surface of the amorphous silicon film by utilizing the mask. Next, a heat treatment is implemented to grow crystals. This crystal growth occurs with the diffusion of the nickel. Next, phosphorus is doped to a region by using the mask. Then, another heat treatment to removes the nickel from the pattern under the mask. After that, the silicon film is patterned by utilizing the mask again to form a pattern.
U.S. Pat. No. 6,338,991 (Zhang) relates to a method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paladium, osmium, iridium, platinum, scandium, titanium, vanadium, chromium, manganese, copper, zinc, gold, silver or a silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon.
U.S. Pat. No. 6,242,779 (Masashi) relates to a method for annealing amorphous silicon film to produce polycrystalline film suitable for thin-film transistors fabricated on glass substrates. The method involves using the selective location of nickel on a predetermined region of silicon to define the pattern of the lateral growth front as the silicon is crystallized. The method defines the resistivity of the silicide formed. The method also defines a specific range of nickel thicknesses to form the nickel silicide. A minimum thickness ensures that a continuous layer of nickel silicide exists on the growth front to promote an isotropic lateral growth front to form a crystalline film having high electron mobility, while a maximum thickness limit reduces the risk of nickel silicide enclaves in the crystalline film to degrade the leakage current.